Dirk Thanks!
Please send me zxgate also, I was checking sourceforge but I couldn't download source but I really need to install some CSV client since I only have SVN currently.
Regarding alternate cores here is progress so far:
I' can't fit in original pic with HDD multi block transfer and alternate core loading together so I have added few defines to enable/disable each feature.
Multi block transfer is still not finished only HDD code is reorganised a bit to allow it.
However, due to my curiosity, I have added menu loading of alternate core and currently I was trying with VIC20 core.
I'm still having issues loading alternate core, so any help would be appreciated.
Here is what is happening:
1.) When I try to load core, function fails to get INIT_B high so programming can't be started.
2.) I have analyzed JanD. code a bit and noticed that he is using this sequence prior to sending FPGA data.
Code:
RA2 = 0;
PROG_B=0; /*reset FGPA configuration sequence*/
PROG_B=1;
I'm using only:
Code:
PROG_B=0; /*reset FGPA configuration sequence*/
PROG_B=1;
When I add:
Code:
RA2 = 0;
I have managed to load VIC20 core only once and reset on minimig fails to reload original core.
So I can only assume that core programming sequence is wrong for reprogramming FPGA and somehow works after pic reset.
JanD also says in his comments:
Code:
//For proper operation the alternative core(s) should have the signals SPI_DOUT, SPI_DIN, SPI_CLK defined as 'Z', otherwise the interfere with the MMC/SD-card and the PIC will not be able to restart with a new core when the reset-button is pressed. The system would simply respond (on the serial port) "No card found"
I suspect this is related to core itself and mapping pins to avoid SPI operation interference.
I have uploaded code to trunk, if anyone wishes to take a look, It will fail to load core but rest works fine.
I'm going to investigate this further...
Boing4000 I like the idea in general but c64 and vic20 have 3 different rom files at least 3 parts.
There is also issue of loading of cartridge roms like RESIDos for spectrum etc.
So I'm considering to take Minimg parts like Bootrom, OSD display, SPI ,Keyboard etc and make this as part of any other core so bootrom can take over handling complex scenarios like rom loading etc, I would also need to tako part of floppy and display adapters too.
But this part of verilog should be small as possible for us to be able to fit in other cores but this would always be part of any core developed for minimig.
I'm still light years away from it but I'm learning and having fun

, but one step at the time.
Quille