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 Post subject: New core for the Altera DE1 & DE2 released!
PostPosted: Tue Sep 01, 2009 1:44 pm 
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Joined: Thu Jun 18, 2009 9:54 am
Posts: 34
New core for the Altera DE1 & DE2 released!

It's based on latest Yakube's version, and you're late getting this if you're the lucky owner of this nice new Altera Amiga :D

http://gamesource.groups.yahoo.com/grou ... g68/files/

get the file configDE1&2_release20.zip and get ready :D


I'm having problems myself with my Altera DE1 equipped with ZENTEL Ram chips. Maybe you have more luck while I try to fix mine!


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 Post subject: Re: New core for the Altera DE1 & DE2 released!
PostPosted: Tue Sep 01, 2009 4:19 pm 
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Joined: Mon Dec 01, 2008 9:58 pm
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Thats nice, thanks :)

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 Post subject: Re: New core for the Altera DE1 & DE2 released!
PostPosted: Fri Oct 23, 2009 9:51 am 
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Joined: Thu Jun 18, 2009 9:54 am
Posts: 34
New Minimig core for DE1 & DE2 released today: ARM controller support (without the ARM controller itself...) :D


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 Post subject: Re: New core for the Altera DE1 & DE2 released!
PostPosted: Fri Oct 23, 2009 1:10 pm 
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Joined: Mon Dec 01, 2008 9:58 pm
Posts: 640
Cool stuff :)
I guess there still is an IP Z80 working as PIC/ARM replacement?
Do the TG68 core also support 28MHz? If yes, how fast is it in Sysinfo V3.24?

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 Post subject: Re: New core for the Altera DE1 & DE2 released!
PostPosted: Sat Oct 24, 2009 4:34 am 
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Joined: Sun Jan 04, 2009 3:48 am
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boing4000 wrote:
Cool stuff :)
I guess there still is an IP Z80 working as PIC/ARM replacement?
Do the TG68 core also support 28MHz? If yes, how fast is it in Sysinfo V3.24?

The TG68 at 28MHz with the "fast" interface is 12x faster than a vanilla 68k, providing you can feed the beast with a continuous stream of instructions and data.
You need an instruction/data cache to achieve that performance since an SDRAM in pure random access has a minimum cycle time of 60-70ns (tRC value in an SDRAM datasheet). I do not know if Tobias has done it yet.
The Minimig does not have this kind of problem since it uses 10ns SRAMs.

Regards,

Frederic


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 Post subject: Re: New core for the Altera DE1 & DE2 released!
PostPosted: Sat Oct 24, 2009 12:07 pm 
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Joined: Mon Dec 01, 2008 9:58 pm
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frenchshark wrote:
The TG68 at 28MHz with the "fast" interface is 12x faster than a vanilla 68k, providing you can feed the beast with a continuous stream of instructions and data.

The Minimig does not have this kind of problem since it uses 10ns SRAMs.


If I do remember right, the TG68 core is working faster then the real 68000 because there is no machine cycle present to decode each instruction. Therefor even at 7.09MHz sysinfo points out a higher result compared to the real chip.
This also causes trouble in some (old) game/demo if the code suddenly runs faster then expected. Jens once told me the ip-cpu need some slowdown in this case (via idle loops) to match original cpu speed.

Dennis' Minimig V1.x design is based on 10ns S-RAM but ACube uses 45ns chips. Therefor the real cpu can not access the memory at full speed. Also the RAM chip IC7 get a bit warm if running FPGA64, due to faster timing then "allowed", but its still working.

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 Post subject: Re: New core for the Altera DE1 & DE2 released!
PostPosted: Sun Oct 25, 2009 10:56 am 
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Joined: Sun Dec 28, 2008 3:00 pm
Posts: 21
Has anyone tried to switch the cpu frequency ?
The OSD selector only allows "normal" speed.

The DE1 version works nearly flawless for me. All adfs which aren“t possible to load in the past doing their job now.


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