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 Post subject: porting Minimig to Digilent Nexys2 FPGA Board
PostPosted: Fri Jun 25, 2010 9:44 am 
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Joined: Thu Jun 24, 2010 2:36 pm
Posts: 3
Hi

I want to port Minimig to Digilent Nexys2 FPGA Board

http://www.digilentinc.com/Products/Det ... rod=NEXYS2

with TG68 core and PIC or ARM opencore. There will be little daughter board with SD slot, connector and few resistors needed.
But that's easy to made on prototype board, because spare FPGA signals are available on usual pin headers also.


Which stable sources do you recommend me to start with?


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 Post subject: Re: porting Minimig to Digilent Nexys2 FPGA Board
PostPosted: Fri Jun 25, 2010 12:20 pm 
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omikron wrote:
Which stable sources do you recommend me to start with?

Alwyas the current/latest release version. In this case YB091224
Everything older dont make any sense.

Have fun with the porting :)

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 Post subject: Re: porting Minimig to Digilent Nexys2 FPGA Board
PostPosted: Fri Jun 25, 2010 12:49 pm 
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boing4000 wrote:
Alwyas the current/latest release version. In this case YB091224
Everything older dont make any sense


Where can I get it?
I found YQ091224 only at the Google code. Without the sources, the bitstream only.

Is the SPI communication protocol between FPGA and PIC described somewere?


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 Post subject: Re: porting Minimig to Digilent Nexys2 FPGA Board
PostPosted: Fri Jun 25, 2010 1:05 pm 
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Location: .de
The full sources is to get here or via svn client:
Code:
svn checkout http://minimig.googlecode.com/svn/trunk/ minimig-read-only

I cant answer the SPI question but maybe yaqube or quille can help here :)

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 Post subject: Re: porting Minimig to Digilent Nexys2 FPGA Board
PostPosted: Sat Jun 26, 2010 8:40 am 
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omikron wrote:
Is the SPI communication protocol between FPGA and PIC described somewere?

There is no separate detailed description but some info is available in the sources.


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 Post subject: Re: porting Minimig to Digilent Nexys2 FPGA Board
PostPosted: Wed Jul 21, 2010 3:57 pm 
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Joined: Sun Jan 04, 2009 3:48 am
Posts: 80
yaqube wrote:
omikron wrote:
Is the SPI communication protocol between FPGA and PIC described somewere?

There is no separate detailed description but some info is available in the sources.


I have done a porting on a Cyclone III board with no external ARM or PIC.
I first tried to keep the floppy.v file with the SPI slave controller connected to a NIOS II CPU with a SPI master controller but the SPI was getting out of sync.
Finally, I rewrote the floppy controller with a parallel interface to the FIFO and to some control registers. The NIOS II CPU can "see" the DSKLEN and DSKSYNC registers of the Minimig and the pseudo MFM encoding and byte swapping is done by the HW.
As a consequence, the source code in FDD.c and FPGA.c is a lot shorter and simpler.
The execution speed is also much faster and I just need 2KB of FIFO space instead of 4KB (I just have 10 MIPS on the NIOS II).
You should consider this option.

Regards,

Frederic


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